Started Working on Virtex-6 FPGA ML605 Evaluation Kit
Hello Guys, I came up with this post for sharing my experience of working on Virtex-6 FPGA ML605 Evaluation Kit. This kit cost you around 3.5Lacks. So you cant afford. I am very lucky to have this kit in my University as my M.Tech studying is going on.
So this kit has everything which can utilize the full power of Xilinx Virtex-6 XC6VLX240T-1FFG1156 FPGA.
Below link is official discription of the board and its features
Experiment - 1 Built In Self Test: The below pdf describes the built in self test step by step.
The below link is of "ML605 Reference Design User Guide"
The pdf only describes the concepts of reference designs which are available with the Kit. These reference designs are made to test the various capabilities of ML605 Board.
Chapter 1: ML605 Evaluation Board Introduction
1- ML605 Features
2- Reference Designs
a- Built-In Self Test (BIST)
b- Memory Interface Generator (MIG) DDR3 Design
c- Integrated Block for PCI Express
d- MultiBoot Design
e- ChipScope Pro IBERT Design
f- System Monitor
Stand-Alone Applications
Restoring Flash Contents
The below link is of "ML605 Hardware User Guide"
The pdf only describes the hardware details of every chip and important hardware components which is embedded in ML605 Evaluation Board.
Detailed Description of some important parts
1. Virtex-6 XC6VLX240T-1FFG1156 FPGA
2. 512 MB DDR3 Memory SODIMM
3. 128 Mb Platform Flash XL
4. 32 MB Linear BPI Flash
5. System ACE CF and CompactFlash Connector
6. USB JTAG
7. Clock Generation
8. Multi-Gigabit Transceivers (GTX MGTs)
9. PCI Express Endpoint Connectivity
10. SFP Module Connector
11. 10/100/1000 Tri-Speed Ethernet PHY
12. USB-to-UART Bridge
13. USB Controller
15. IIC Bus
16. Status LEDs
17. User I/O
The below link is of "Getting Started with the Virtex-6 FPGA ML605 Embedded Kit"
The pdf describes how to proceed with this board. List of available itema in Kit box and what resources are available on net. Also describes how to install different drivers as for UART, Xilinx Software and its licensing.
Here is the link to download the USB to UART driver from its official site.
The below link is of "AXI Interface Based ML605/SP605 MicroBlaze Processor Subsystem"
The below link is of "Getting Started with the Xilinx Virtex-6 FPGA ML605 Evaluation Kit
The pdf describes how to use base reference design for image processing.
There are following steps to use base reference design
1- Install USB to UART driver
2- Run all Built In Self Test "BIST"
3- Connect Ethernet Cable and create connection by Network interface selection.
4- Open Base Refrence design and select the connection by which your system is connected to Kit' IP .
5- If u can see "Connected to FPGA" , it means everything is according to our plan.
6- Select any image of recommended size and aplly any mask of specified size as 5*5, 8*8 or other.
7- The changes in processed image occur simultaneously as change any parameter in the GUI of BRD.
The pdf also describes the experiments with PCI Express.
The below link is of "Hardware User Guide" which describes the basic connection steps to operate the kit.